The invention relates to a phase change memory comprising a memory material layer consisting of a phase change material, and a first and second electrical contact which are located at a distance from one another and via which a switching zone of the memory material layer can be traversed by a current signal, wherein the current signal can be used to induce a reversible phase change between a crystalline phase and an amorphous phase and thus a change in resistance of the phase change material in the switching zone. The invention also relates to a phase change memory assembly, a phase change memory cell, a 2D phase change memory cell array, a 3D phase change memory cell array and an electronic component.
One of the essential basics of modern information technologies consists in non-volatile memories. In all data processing, data transmission and “consumer electronics” devices (digital cameras, video cameras, mobile telephones, computers, etc.), non-volatile memories are required in order to provide buffer storage of information, or in order to keep important information available for boot operations when the device is switched on. At present, the main electronic non-volatile memory is the so-called FLASH memory. Future non-volatile memories could be provided by magnetic memories (MRAM) or ferroelectric memories (FRAM) or in particular phase change memories (Phase-Change RAM/PC-RAM/PRAM/Ovonic Unified Memory-OUM).
The latter form the subject matter of this application. Phase change memories comprise a memory material layer consisting of a phase change material, and a first and second electrical contact which are located at a distance from one another. Via the electrical contacts, a switching zone of the memory material layer can be traversed by a current signal, which carries for example a pulsed switching current. The current signal can be used to thermally induce a reversible phase change between a crystalline phase and an amorphous phase and thus a change in resistance of the phase change material in the switching zone. In the case of a dynamic range for the change in resistance of up to three orders of magnitude, this is used for bit or multi-bit information storage in a phase change memory. The physical principle of a phase change memory will be explained in more detail in the detailed description relating to FIG. 1.
Phase change memories have been known in principle since the 1960s, and are described for example in the article “Reversible Electrical Switching Phenomena in Disordered Structures” by Ovshinsky in Physical Review Letters, Vol. 21, pages 1450-1453. The state of current technology can be found in the articles “OUM—A 180 nm Non-volatile Memory Cell Element Technology for Stand Alone and Embedded Applications” by Lai and Lowrey in IEEE 2001, pages 36.5.1 to 36.5.4 and “Nonvolatile, High Density, High Performance Phase-Change Memory” by Tyson, Wicker, Lowrey, Hudgens and Hunt in IEEE 2000, pages 385 to 390.
Current information technology means that a convergence can be expected between the fields of cost-effective bulk memories (e.g. hard disks and optical data memories) and fast electric memories (e.g. FLASH), resulting in so-called “Unified Memories” (PC-RAM) which combine cost-effective production with rapid random addressing in order to operate in both market sectors with a single technology. The ease of implementation and the potential of phase change memories as non-volatile memories in this scenario depends primarily on the degree to which a plurality of phase change memories can be highly integrated. To this end, it must be possible for a phase change memory to be switched by means of the smallest possible switching currents of a current signal, since a phase change memory could otherwise not be operated by future highly integrated CMOS control transistors.
The present concept of a phase change memory is described in detail in U.S. Pat. No. 5,933,365. This concept is based on a vertical current flow between two electrical contacts of the phase change memory which are arranged one above the other. That is to say, the current of a current signal for switching a phase change memory of the type mentioned above is conducted perpendicularly to the lateral extension of the phase change memory, that is to say perpendicularly to the deposition/lithography plane of the phase change memory, between two electrical layer contacts which are arranged one above the other in the vertical extension. According to the conventional view, this “vertical” structure of a phase change memory is the preferred structure in order to be able to integrate as many cells as possible in a phase change memory array by way of row/column (X/Y) addressing. One example of a three-dimensional (3D) phase change memory array is described in U.S. Pat. No. 6,525,953 B1.
One problem is that the phase change between a crystalline phase and an amorphous phase in the phase change material is induced thermally via a current pulse of the current signal, e.g. using a temperature range between room temperature and 600° C. The current signal is fed into the phase change memory via the electrical contacts, which are usually made of metal, such that a switching zone of a memory material layer is traversed by the current signal. Since electrical conductors are usually also good heat conductors, this means in the conventional concepts of a phase change memory that a high energy loss occurs between the thermally influenced switching zone and the electrical contact, which in turn makes it necessary to increase the switching currents of the current signal.
However, small control transistors, which are necessary for any memory element that can be highly integrated, usually do not supply enough current to switch a conventional phase change memory having a vertical structure. The solution favoured in U.S. Pat. No. 5,933,365 therefore consists in the use of a so-called “heater”, that is to say a “heater” layer is applied in each case between an electrical contact and the memory material layer within the context of the vertical structure, said heater layer being made of a material which is less of a conductor of current and heat than the electrical contact itself. The “heater” therefore has a thermally insulating effect between the memory material layer and the electrical contact. In this way, the switching zone of the phase change memory can be heated more efficiently, and as a result can be switched by lower switching currents. This means that a phase change between a crystalline phase and an amorphous phase and thus a change in resistance of the phase change material in the switching zone can be induced by lower switching currents of a current signal.
However, the effect of the “heater” layer provided in U.S. Pat. No. 5,933,365 within the context of the vertical structure of the phase change memory is limited and does not reduce the switching current requirement for a current signal to an extent such that a sufficiently high level of integration can be achieved. Moreover, the structure of a phase change memory becomes increasingly complicated on account of the “heater” layers.